Enabling M7 Core and Resource Sharing with Linux - Part 1

2024.11.25by debix.io

① Obtain M7 Firmware

1. Obtain the firmware through the IAR project

2. Obtain the firmware through the ARMCC

For details about how to obtain the firmware, see the documentation: https://cache.nxp.com.cn/secured/assets/documents/en/user-guide/MCUXSDKGSUG.pdf?__gda__=1663319159_a1de3ef22ab76fd8f1f3f83ee9c1b0b3&fileExt=.pdf.

Take hello_world project as an example, please prepare the hello_world.bin file.


② Uboot Starts the M7 Core1. Modify imx8mp-evk.dts device tree

1. Modify imx8mp-evk.dts device tree

--- /arch/arm64/boot/dts/freescale/imx8mp-evk.dts

+++ /arch/arm64/boot/dts/freescale/imx8mp-evk.dts

@@ -15,6 +15,55 @@

chosen {

stdout-path = &uart2;

};

+ reserved-memory {

+ #address-cells = <2>;

+ #size-cells = <2>;

+ ranges;

+

+ m4_reserved: m4@0x80000000 {

+ no-map;

+ reg = <0 0x80000000 0 0x1000000>;

+ };

+

+ vdev0vring0: vdev0vring0@55000000 {

+ reg = <0 0x55000000 0 0x8000>;

+ no-map;

+ };

+

+ vdev0vring1: vdev0vring1@55008000 {

+ reg = <0 0x55008000 0 0x8000>;

+ no-map;

+ };

+

+ vdevbuffer: vdevbuffer@55400000 {

+ compatible = "shared-dma-pool";

+ reg = <0 0x55400000 0 0x100000>;

+ no-map;

+ };

+

+ rsc_table: rsc_table@550ff000 {

+ reg = <0 0x550ff000 0 0x1000>;

+ no-map;

+ };

+ };

+

+//edit by wei

+ imx8mp-cm7 {

+ compatible = "fsl,imx8mp-cm7";

+ rsc-da = <0x55000000>;

+ clocks = <&clk IMX8MP_CLK_M7_DIV>;

+ mbox-names = "tx", "rx", "rxdb";

+ mboxes = <&mu 0 1

+  &mu 1 1

+  &mu 3 1>;

+ memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;

+ status = "okay";

+ };

gpio-leds {

compatible = "gpio-leds";

@@ -318,6 +367,7 @@

};

};

+

&flexspi {

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_flexspi0>;

@@ -569,7 +619,7 @@

clock-frequency = <400000>;

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_i2c3>;

- status = "okay";

+ status = "disabled";

#if 1

codec: es8316@10 {

@@ -828,7 +878,7 @@

<&clk IMX8MP_CLK_DUMMY>;

clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";

fsl,sai-mclk-direction-output;

- status = "okay";

+ status = "disabled";

};

#if 0

@@ -867,10 +917,11 @@

status = "okay";

};

+//edit for wei

&uart4 {

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_uart4>;

- status = "okay";

+// pinctrl-names = "default";

+// pinctrl-0 = <&pinctrl_uart4>;

+ status = "disabled";

};

&usb3_phy0 {

@@ -1229,13 +1280,13 @@

MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x49

>;

};

-

- pinctrl_uart4: uart4grp {

- fsl,pins = <

- MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x49

- MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x49

- >;

- };

+//edit by wei

+ // pinctrl_uart4: uart4grp {

+ // fsl,pins = <

+ // MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x49

+ // MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x49

+ // >;

+ // };

pinctrl_usb1_vbus: usb1grp {

fsl,pins = <



2.Modify device clock clk-imx8mp.c

--- /drivers/clk/imx/clk-imx8mp.c

+++ /drivers/clk/imx/clk-imx8mp.c

@@ -728,6 +728,9 @@

check_m4_enabled();

+ if (of_find_compatible_node(NULL, NULL, "fsl,imx8mp-cm7"))

+ set_cm4_enable(true);

+

np = of_find_compatible_node(NULL, NULL, "fsl,imx8mp-anatop");

anatop_base = of_iomap(np, 0);

of_node_put(np);